Intel, Cadence Expand Partnership to Design Intel 14A Chip

Cadence Design Systems and Intel Foundry have expanded their partnership to optimise Intel’s next-generation Intel 14A process technology for high-performance computing (HPC) and mobile chip designs. 

The multi-year collaboration will focus on design technology co-optimisation (DTCO), design IP readiness and production support to help customers develop chips faster and lower design risks.

Cadence President and CEO Anirudh Devgan said the expanded engagement marks a deeper relationship between the two companies. Devgan said the collaboration would help customers “unlock new levels of performance, power, and efficiency” while accelerating the development of next-generation products.

The partnership will combine Cadence’s AI-driven electronic design automation (EDA) and design IP solutions with Intel’s process technology and chip design expertise. The effort will begin with Intel 14A, one of Intel Foundry’s upcoming process technologies, and aims to deliver production-ready process design kits (PDKs) for customers.

Under the agreement, the companies will improve performance, power and chip area, often referred to in the semiconductor industry as PPA. They will also use Cadence’s agentic AI tools and core design products to speed up product development.

Intel Foundry Executive VP and General Manager, Naga Chandrasekaran, said the partnership supports Intel’s technology roadmap and ecosystem strategy.

“By combining Intel’s process and packaging with Cadence’s AI-driven design tools, we are enabling deeper co-optimisation, strengthening our ability to deliver on customers’ needs, and showcasing the ability of both companies to drive innovation at scale,” Chandrasekaran said.

The expanded cooperation comes as semiconductor companies increase efforts to improve chip performance and shorten development timelines. Foundries and chip design firms are also investing in AI-led tools to reduce engineering complexity and support advanced manufacturing processes.