At last year’s NVIDIA GTC, Bill Dally, chief scientist and senior vice president of research at the US chip-making company, wagered on AI tools to make its own products better. It was a neat reverse sales pitch they were making. Giving an overview of the company’s R&D division, Daly said, “We’re a group of about 300 people that tries to look ahead of where we are with products at NVIDIA. We’re sort of the high beams trying to illuminate things in the far distance.”

NVIDIA’s research using AI for chip design

This year, Daly’s prediction became a self-fulfilling prophecy. On March 26, NVIDIA released research showing how exactly AI could improve the chip-design process. Titled ‘AutoDMP: Automated DREAMPlace-based Macro Placement,’ the paper presents a new method called AutoDMP to improve very large-scale integration or VLSI design automation. 

VLSI is a critical portion of chip design under which an integrated circuit is created by combining thousands of transistors into a single chip. A lot of VLSI design involves deciding where to place tens of billions of tiny on-off switches, called transistors, on a piece of silicon to build chips. 

The correct placement of these transistors is an important factor that determines the cost, speed and power consumption of chips. It’s as good as fitting furniture inside a room ensuring optimum space utilisation. A semiconductor device has transistor blocks such as memory, analogue devices like PCI-Express controllers or memory controllers and the cores themselves, which have to be adjusted adequately. 

Anthony Agnesina and Mark Ren, research scientists at NVIDIA discussed the benefits of AutoDMP in improving this macro placement in a blog post. “These macros are often much larger than standard cells, which are the fundamental building blocks of digital designs. Macro placement has a tremendous impact on the landscape of the chip, directly affecting many design metrics, such as area and power consumption. 

“Thus, improving the placement of these macros is critical to optimising each chip’s performance and efficiency. The process must be improved, given modern complex relationships between macro placement, standard cell placement, and the resulting power, performance, and area or PPA metrics.” 

Reinforcement learning in chip design

In recent years, research has shown that new methods like reinforcement learning can keep up with the ever-growing complexities in chip design. NVIDIA has used DREAMPlace, a GPU-accelerated open source deep learning toolkit, unveiled first in 2019 to automate the largely manual process of placing macros and standard cells. NVIDIA’s research concluded that AutoDMP is a more computationally efficient technique that can optimise a design with 2.7 million cells and 320 macros in three hours on a single NVIDIA DGX Station A100.

Chipmakers have been scrambling to improve efficiencies in the design process using AI as Moore’s law appears to be failing. Daly emphasised just how important the paper was. “You’re no longer actually getting an economy from that scaling. To continue to move forward and deliver more value to customers, we have to be clever with the design. We can’t get it from cheaper transistors,” he stated. 

The University of Texas released research last year using reinforcement learning and added another layer of AI for chips to perform even better. 

Dr Jiang Hu, a professor in the department of electrical and computer engineering at Texas A&M University stated, “Machine learning is quite different from conventional techniques. These do everything from scratch, while machine learning has the capability to extract knowledge from prior designs and reuse the knowledge, which is much more efficient.”

In 2021, a bunch of Google scientists, including Azalia Mirhoseini and Anna Goldie, published a paper in Nature titled ‘A graph placement methodology for fast chip design’ which first showed how AI could finish floorplanning in chips faster and better than engineers. 

Advancing to stay in a competitive market

Having already made important announcements in this year’s GTC held last week, NVIDIA is making definite headway in chipmaking. CEO Jensen Huang spoke about how the company is also rolling out a new software, called cuLitho, to help speed up the design and manufacturing of chips. The software is expected to hasten the step between designing the chip and the physical fabrication of the lithography masks used to print the chip design on silicon. 

NVIDIA is making attempts to seize some of this territory as the world’s largest tech firms move to in-house chip designing threatening to topple the balance of power in the sector. Apple, Google, Amazon, Microsoft, Tesla and other tech powerhouses are all making their own custom chips forcing chip companies to go on the defensive. Notwithstanding the flurry of announcements made at GTC, NVIDIA is in it for more.