Why Synopsys is Onboarding ‘Agentic Engineers’ in Semiconductor Design
By Pallavi Chakravorty ·
The semiconductor industry is entering a new phase of automation. At Synopsys, one of the largest electronic design automation (EDA) companies with more than $6+ billion in annual revenue, artificial intelligence is being woven directly into the chip design workflow. The goal is not to replace human expertise but to dramatically amplify it.
The shift is driven by a brutal reality: designing modern semiconductors is one of the most complex engineering challenges on the planet. Advanced processors can now contain more than 80 billion transistors. And the demand for AI chips has never been as great, fuelling the global semiconductor industry, which is projected to surpass $1 trillion in annual revenue by 2030, according to PwC.
Prith Banerjee, Senior Vice President at Synopsys, says such a transformation begins deep inside the design process.
“In chip design, there is an enormous amount of electronic design automation tools that are used,” he tells AIM. “You enter your design at a register transfer level, generate a netlist of gates, and then place and route them physically to create the final layout.”
That process depends on a vast ecosystem of EDA software—design compilers, physical compilers, and verification tools—each containing dozens or even hundreds of configuration parameters that engineers must tune carefully.
For decades, much of that optimisation relied heavily on human intuition and experience. Now, AI is beginning to take on a growing share of the work.
Reinforcement Learning Enters Chip Design
Synopsys has begun applying reinforcement learning, a machine learning technique in which systems improve through trial and error, to optimise chip design workflows.
“Using reinforcement learning, the system learns from actions and rewards,” Banerjee explains. “Over time, it figures out which combinations improve performance, power consumption, or design efficiency.”
The technology is already producing measurable gains.
“One of the first things we did was design space optimisation,” he says. “With this, we have demonstrated about 20% improvement in power, performance, and area.”
In semiconductor design, even incremental improvements in these metrics can have an enormous economic impact. For hyperscale data centre operators running millions of processors, small efficiency gains can translate into significant reductions in energy consumption and operating costs.
AI is now being extended to optimise other stages of the chip design pipeline as well.
The Rise of ‘Agentic Engineers’
Beyond optimisation, Synopsys is exploring a more ambitious vision: AI agents that actively collaborate with human engineers during the design process.
“These are agents that can assist engineers or even take actions in parts of the workflow,” Banerjee says. “We think of them as agentic engineers.”
The idea mirrors the autonomy levels used in self-driving cars, where systems gradually progress from basic assistance to full autonomy.
“We see a similar progression in chip design,” he observes. “There will be assisting agents, acting agents, and collaborative agents, moving gradually from level one to level five autonomy.”
Despite rapid progress in AI, Banerjee believes the idea of fully autonomous chip design remains far-fetched. “Chip design is extremely complex, and companies want differentiation in their products.”
Instead, the goal is to increase productivity dramatically rather than eliminate human involvement. “What AI will do is complement human engineers, not replace them,” he explains.
If successful, the impact on innovation cycles could be significant.
“You could design a new car in one year instead of four or five,” Banerjee adds. “You could develop a new chip in one year instead of three.”
From Chips to Systems
The role of AI in chip design is also expanding alongside a broader shift in the semiconductor industry, from designing individual chips to designing entire systems.
That strategy gained momentum after Synopsys acquired engineering simulation company Ansys in 2024 in a $35 billion deal, one of the largest acquisitions in the semiconductor design ecosystem. By combining electronic design automation with physics-based simulation tools, engineers can now model interactions across entire systems during the design phase.
The capability is becoming increasingly important as industries such as autonomous vehicles, aerospace, and advanced medical devices rely on highly integrated semiconductor systems. Modern vehicles, for example, can contain more than 3,000 semiconductor chips, a number expected to rise sharply as autonomous cars enter the fray.
The Challenges of the Sub-2nm Era
The need for such integrated design tools is becoming even more urgent as the semiconductor industry pushes towards ever smaller manufacturing nodes.
Chipmakers including TSMC, Intel, and Samsung are racing to bring 2nm process technologies to market later this decade. But shrinking transistor sizes dramatically increases engineering complexity.
“As you move to 2nm and even smaller nodes like 18 or 14 angstroms, chips are increasingly built using chiplet architectures and 3D IC technology,” Banerjee explains.
Rather than building one large chip, manufacturers are increasingly stacking multiple smaller chips vertically to improve performance and efficiency.
The approach introduces new engineering challenges, particularly around heat and electromagnetic interactions. Advanced GPUs used in AI data centres can consume thousands of watts of power, creating enormous thermal management challenges when packed into dense semiconductor packages.
Engineers must therefore simulate multiple physical interactions simultaneously, including heat flow, electrical behaviour, and cooling systems.
The Real Constraint: Talent
Despite rapid technological advances, the biggest constraint on semiconductor innovation may not be technology or geopolitics, but talent.
Deloitte projects that the global semiconductor industry will face a shortage of more than 1 million skilled workers by 2030.
“If we didn’t have AI tools, instead of needing 100,000 engineers, we might need a million,” Banerjee says.
AI, in his view, is becoming essential to scaling human capability. As chip complexity magnifies, the future of semiconductor design may depend less on replacing engineers and more on optimising talent.