Keysight Technologies introduced 3D Interconnect Designer, a new tool in its electronic design automation (EDA) portfolio. This is to address the growing complexity of 3D interconnect design for chiplet and 3D-IC advanced packages used in AI infrastructure and data centres.
The company said the solution automates complex workflows that often delay product development. The tool targets engineers working on multi-die and stacked-die applications, where manual optimisation of vias, transmission lines, solder balls, and micro-bumps slows progress and increases design spins.
Nilesh Kamdar, General Manager, EDA Design and Verification at Keysight, said manual 3D interconnect design has become a bottleneck due to rising complexity.
“By streamlining the process and providing early insights into potential issues like signal and power integrity, we're enabling engineers to get products to market faster and deliver compliant designs on tighter timelines,” he added.
Keysight said the software reduces iterations and shortens development cycles by enabling faster design, optimisation and validation of 3D interconnects.
As chiplet architectures gain adoption, traditional workflows struggle to handle the complexity of 3D interconnect geometries. Engineering teams spend significant time ensuring signal and power integrity in dense systems, which can delay launches and raise costs.
Keysight said its EDA software provides a dedicated workflow for designing and optimising 3D interconnects accurately. The tool supports complex geometries, such as hatched or waffled ground planes, which help address fabrication constraints in silicon processes, including interposers and bridges.
The company said the solution accelerates design cycles by removing manual steps and improving first-pass success. It also validates designs against standards such as Universal Chiplet Interconnect Express and Bunch of Wires early in the lifecycle, reducing the risk of late-stage failures. Electromagnetic simulation enables electrical analysis of printed circuit boards and 3D interconnect designs for packages.
The solution integrates with Keysight’s EDA tools and also supports a standalone version. Teams can incorporate 3D interconnect design and optimisation into existing workflows without major changes.
When combined with Chiplet PHY Designer, engineers can also design and optimise 3D interconnects for chiplets and 3D-integrated circuits, improving accuracy in multi-die systems.


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